Lila Soto: Hugo, long week — you've got that look like you've been arguing with a textbook.
Hugo Vance: Something like that. I've been staring at a cost figure that, on its face, should not be true. And yet it is.
Lila Soto: Okay — what figure?
Hugo Vance: Manufacturing a billion transistors on an advanced-node die — we're talking the frontier nodes TSMC is running — costs something in the high single digits to low teens in dollars. It used to cost around five dollars forty at the N5 node. The cost went up. That is the opposite of what sixty years of semiconductor economics said would happen.
Lila Soto: Wait, it went — up? Not slower-down, actually up?
Hugo Vance: Up. Which is why today I want to go back to 1965 — Gordon Moore, Electronics Magazine, a doubling of transistors annually, revised to every two years by 1975. That observation became, over time, an industry compact. Intel and TSMC shaped entire capital strategies around it. The compact said: push the frontier, the unit cost falls, everyone benefits. And then — around 2015, quietly — that compact inverted.
Lila Soto: And what I find almost eerie is that performance kept climbing anyway. Like the economic floor dropped out and nobody stopped running.
Hugo Vance: That is precisely the paradox I cannot resolve by pattern alone. How does a paradigm outlive the collapse of its own economic logic? That's the question.
Lila Soto: But here's what I keep getting stuck on — why does it get harder physically? Like, we're not just talking money. At 3nm, the transistors are barely wider than a strand of human DNA. Which is... I mean, imagine trying to build a door latch smaller than an atom. At some point the door doesn't know it's supposed to stay shut.
Hugo Vance: That's actually the right image. The electrons just — sneak through. Through walls they shouldn't be able to cross at all.
Lila Soto: Wait, literally through? Not around?
Hugo Vance: Through. Quantum tunneling — the electron doesn't climb the barrier, it materializes on the other side. At this scale, you cannot stop it. It causes leakage currents, which compromises the transistor's reliability. And then there's the second problem, which is almost mundane by comparison: heat. Pack more transistors per square millimeter and the heat per unit area rises. Removing it becomes its own constraint. You're not just building smaller — you're building a neighborhood that keeps catching fire.
Lila Soto: The neighborhood catches fire. Yeah, okay, that I can hold onto.
Hugo Vance: Now — IBM announced successful 2nm fabrication in 2021. Physically works. The physics is not the wall.
Lila Soto: Oh — so we hit the market wall before the physics wall? That completely changes what 'Moore's Law is dead' even means.
Hugo Vance: Precisely. The physics is feasible. The economics are not — yet. And that distinction matters enormously for what we think comes next.
Lila Soto: So if it's a market wall, not a physics wall — the industry can't just wait it out. They had to find a different door entirely.
Hugo Vance: And they did. You see, the first move was almost accidental. GPUs — originally designed to render graphics, thousands of small arithmetic units running in parallel — someone noticed they were extraordinarily good at matrix operations. Which are the core of machine learning. That's not a design decision. That's a discovered repurposing.
Lila Soto: Wait — AI ran on graphics cards first? Like, gaming hardware?
Hugo Vance: Exactly that. And then Google looked at that and said — well, if we know what the workload is, why use general hardware at all? They built the Tensor Processing Unit. A custom ASIC, specialized matrix-multiplication hardware, purpose-built for neural-network inference and training. That's the deliberate version of what the GPU did by accident.
Lila Soto: The deliberate version. Yeah. And that's — I mean, culturally it's strange for me. Because picture a machine-learning engineer at a mid-size startup right now, 2024. She wrote her code in PyTorch, trained on a GPU cluster, reasonable assumptions. Now she's running inference on a TPU cluster and... the code doesn't transfer cleanly. She's not on a worse chip. She's on a faster chip that breaks what she built.
Hugo Vance: The portability assumption dissolved.
Lila Soto: Gone. And it's not just TPUs — ASICs now for networking, cryptography, video processing. Each optimized for one domain. The performance gains are real, but they're coming from memory hierarchies, custom instruction sets, system-level integration — architectural choices, not smaller transistors. Which makes me wonder: does specialization just lock in whatever problems we happen to understand today?
Hugo Vance: That is precisely where I'd be cautious. Google built the TPU because they knew what neural-net inference looked like in 2016. The part we still don't understand is whether chips optimized for today's known workloads obstruct the next unforeseen application entirely. And there are answers being proposed — GAA transistors, 3D chiplet architectures, design-technology co-optimization — but whether those resolve the tension between specialization and flexibility, that's what we need to get into.
Lila Soto: Yeah — and that tension might be sharper than it looks right now.
Hugo Vance: Sharper than it looks — yes. Because the flip side nobody names cleanly is this: code optimized for a TPU does not run efficiently on a GPU. Neither maps onto a traditional CPU without significant rework. That's not a version mismatch. That's an ecosystem splitting at the seam.
Lila Soto: Which means the compiler, the API layer, the distribution model — all of it was built on the assumption that one piece of code runs everywhere, just faster each year. That assumption is gone.
Hugo Vance: Gone, or — well, being renegotiated by whoever controls the dominant specialized chip. Which is, I think, the uncomfortable part. Fragmentation favors the incumbent. Nvidia's position in training, Google's TPU ecosystem for inference — that's not just market share, that's lock-in dressed as performance.
Lila Soto: But it also — mm, wait — does it open space for new entrants? If density isn't the only game anymore?
Hugo Vance: In theory. You don't have to beat TSMC at 2nm to be relevant. You can build a chiplet — tile multiple smaller dies, stack them — and get competitive density without miniaturizing within each die. 3D integration. That's a real opening for someone who can't spend fifty billion on a fab.
Lila Soto: Huh. So Gate-All-Around transistors, DTCO, chiplets — these aren't just engineering patches. They're kind of... rewriting what the competition is even about?
Hugo Vance: That's exactly where I'd want to be careful, actually — because DTCO, the joint optimization of design and manufacturing process rather than treating them as separate steps, that extracts real gains. But it also means the design and the fab are now deeply coupled. Which reintroduces a kind of lock-in at the manufacturing level that we thought fabless companies had escaped.
Lila Soto: Oh — so the solution to the density problem generates its own fragmentation problem. One structural problem, new structural problem.
Hugo Vance: And that, I think, is where IBM's 2nm result lands hardest. The physics permits fabrication below current commercial nodes. The market fragmentation — the software layer, the compiler rewrites, the DTCO coupling — that's what isn't resolved. We are not waiting on physics. We are waiting on an institutional answer to a problem the institutions may have created.
Lila Soto: The thing I can't settle — and I've been turning it over the whole time we've been talking — is whether the next big application, the one nobody's named yet, arrives faster or slower in a world where the hardware has already decided what it's for. Like, the TPU assumed it knew what inference looked like. What if the next thing is something inference doesn't describe?
Hugo Vance: I think that's the honest unresolved piece. I can tell you that Gordon Moore's 1965 observation was never a law — it was a bet that kept renewing itself because everyone bet on it together. What replaced it isn't a new bet. It's a dozen separate bets, each one optimized for a known workload. Whether that architecture — GPU here, TPU there, custom silicon for every layer — whether that accelerates discovery or forecloses it... I genuinely do not know. The era of one chip to rule them all may have been the anomaly. But anomalies sometimes produce the conditions for the next anomaly, and I cannot tell you if specialized silicon does that or prevents it.
Lila Soto: Yeah. And I guess I want to sit with that rather than resolve it. It feels like the right place to leave it — genuinely open. Thanks for going into the weeds with me on this one.
