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How quantum tunneling and heat density are slowing silicon scaling

July 1, 2026 · 6 min

Clara Bennett & Finn Brooks

IBM has built a 0.7nm prototype chip packing 100 billion transistors — more than ten times the neurons in a human brain — yet cost per transistor is rising, not falling. Quantum tunneling and heat density impose hard physical limits, and no single successor metric has replaced Moore's Law as the industry's shared north star.

Moore's Law, first articulated by Gordon E. Moore of Fairchild Semiconductor in 1965, is the empirical observation that the number of transistors on a dense integrated circuit doubles roughly every two years, accompanied by declining cost per transistor and increasing computing performance.

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About this episode

For sixty years, one number organized an entire global industry. Gordon Moore noticed in 1965 that transistor density was doubling at a falling cost per unit — an economic observation dressed up, over time, as a law of nature. Engineers, investors, and chipmakers all built their roadmaps around it, and in doing so, made it come true. Now the density metric is still climbing — IBM just prototyped a 0.7 nanometer chip carrying 100 billion transistors, stacking two layers to double density over its 2021 design — but the economic half of the promise has quietly broken. Cost per transistor is rising, not falling, as each new node demands dramatically more capital to build. This episode digs into why that's happening at a physical level. At sub-5 nanometer scales, quantum tunneling becomes unavoidable: electrons probabilistically pass through the barriers that gate transistors are supposed to enforce, generating leakage current and, at the scale of billions of transistors, heat densities that no cooling architecture can simply absorb. Workarounds like Gate-All-Around transistors and chiplet architectures offer real gains in electrostatic control and design flexibility, but they're extensions, not escapes. What's genuinely unresolved is what replaces the shared north star. Silicon photonics, neuromorphic chips, 2D materials like molybdenum disulfide — each is a plausible direction. But none of them is one number. And whoever defines the successor metric shapes the next era of computing.

Frequently asked

What is quantum tunneling and why does it limit transistor scaling?

At sub-5nm transistor sizes, electrons probabilistically pass through the gate's energy barrier rather than being blocked by it — a quantum effect called tunneling. The transistor registers as switched off while current still leaks through. Billions of simultaneously leaking transistors generate heat densities that no conventional cooling solution can adequately absorb.

Is Moore's Law dead?

Moore's Law is simultaneously alive and dead, depending on which promise you measure. Transistor density continues to climb — IBM's 0.7nm prototype doubles the density of its 2021 design — but the original economic promise of cheaper cost per transistor has already broken down, with Intel and TSMC pouring dramatically more capital into each new node.

What are chiplets and how do they work around silicon scaling limits?

Chiplets disaggregate a processor into smaller, separately manufactured dies that are then connected, avoiding the yield and heat penalties of cramming everything onto one shrinking piece of silicon. TSMC's COUPE chiplet platform is already in mass production, and Ayar Labs closed a $500 million Series E for optical interconnect chiplets that move data between dies using light.

What materials could replace silicon in future chips?

2D materials such as molybdenum disulfide are the leading candidates to replace silicon at extreme transistor dimensions. Silicon stops functioning reliably at the scales required by sub-2nm roadmaps, and 2D materials offer the thin-channel properties needed — though the economic cost and thermal penalties at each successive node grow sharper regardless of the material used.

What was Gordon Moore's original prediction and has it held up?

Gordon Moore's 1965 observation was an economic pattern — more computing for less money on a regular cycle — not a physical law. He revised it to a doubling every two years in 1975, and the industry treated it as a self-fulfilling target for six decades. Today, transistor density still climbs but the cost-reduction half of that promise has broken down.

Grounded in 12 sources
Accelerate & Actualize: Can 2D Materials Bridge the Gap Between Neuromorphic Hardware and the Human Brain? · arxiv.org
Synthetic Biology meets Neuromorphic Computing: Towards a bio-inspired Olfactory Perception System · arxiv.org
Sub-1nm Process Technology Won't Arrive Till 2034, Logic Roadmap Highlights 2D FETs For 0.2nm & Sub 0.2nm Nodes By 2043-2046 · wccftech.com
After Silicon: The Technologies That Will Power the Next Era of Computing · medium.com
IBM debuts sub-1 nanometer chip technology | Hacker News · news.ycombinator.com
Moore’s Law Explained: Past, Present, and What Comes Next · datacamp.com
How Many Nanometers Until Physics Says No? The 3 Walls Beyond 2nm, Read Through Papers in 2026 - DEV Community · dev.to
Chiplets past, present, and future: how advanced packaging is shaping silicon - Electrical Engineering News and Products · eeworldonline.com
Moore's law - Wikipedia · en.wikipedia.org
Is Moore’s law dead? | imec · imec-int.com
Understanding Moore's Law: Is It Still Relevant in 2025? · investopedia.com
Lithography at the end of scaling - IOPscience · iopscience.iop.org
Read transcript

Finn Brooks: Clara, hey — did you sleep okay? Because I did not, I went down this IBM rabbit hole at like midnight and now I have feelings.

Clara Bennett: The transistor thing, or — wait, which part got you?

Finn Brooks: Okay the number. A hundred billion transistors. On something the size of a fingernail. IBM just — they built that. A 0.7 nanometer prototype, two stacked layers, doubles the density of their 2021 design. And my brain just kept going: that's more than ten times the neurons in a human brain, sitting on a chip. That is absurd.

Clara Bennett: It is. And yet — the cost per transistor is going up, not down. That's what gets me.

Finn Brooks: Wait, up?

Clara Bennett: Up. And that matters because Gordon Moore's original 1965 observation — it wasn't just about density. The whole point was economic: more computing for less money, every year. Density climbing while cost per unit rises, that's... technically impressive and actually a broken promise at the same time. Which is sort of the strange shape of what we're looking at today.

Clara Bennett: Think of it like a parking garage. For sixty years, every time they built a new one, they fit twice as many cars — and each parking space cost less to construct. That's the deal. Density *and* cheaper. Now they're stacking floors to hit the density numbers, but each floor costs more to build. You've got the cars. You've lost the deal.

Finn Brooks: Wait — so the IBM prototype, the stacked layers thing, that's literally the garage adding a floor?

Clara Bennett: Exactly that. Gordon Moore in 1965, he wasn't describing a law. He was noticing a pattern in cost curves. An experience-curve relationship. Then in 1975 he revised it to every two years, and the industry just... treated it like a target. For six decades Intel, TSMC, everyone built roadmaps around it. It became self-fulfilling because they decided it would be.

Finn Brooks: Hold on. It was never actually a law?

Clara Bennett: Never. Named like one, treated like one — but it was always a prediction people chose to make come true. And that's, I mean, that's actually what makes this moment so disorienting. The density metric still climbs, so technically you can say Moore's Law is alive. But the economic promise — cheaper per transistor — that's already gone. Intel and TSMC are both pouring dramatically more capital into each new node. So it's simultaneously alive and dead depending on which promise you're measuring.

Finn Brooks: Okay that framing — alive *and* dead at the same time — that is actually the most useful thing I've heard because every article I read just picks one side and argues it.

Finn Brooks: Okay but wait — what actually stops you from just making transistors smaller forever? Like at some point is it just... hard manufacturing, or is there a real wall?

Clara Bennett: Actual physics. That's the wall. At sub-5 nanometers, electrons don't stay where you put them. Quantum tunneling — they probabilistically pass right through the energy barrier the gate is supposed to enforce. The transistor is switched off and current is still leaking through.

Finn Brooks: Ghost through the barrier.

Clara Bennett: Exactly. And that leakage generates heat — and now you're not just dealing with one transistor, you've got billions of them leaking simultaneously. The heat density becomes, I mean — there's no cooling solution that just absorbs it. You've hit a thermal wall that the shrinking itself created.

Finn Brooks: So the roadmaps going to 0.2 nanometers by 2046, those aren't — wait, are those even real? Like is that theoretically possible or is that just a spreadsheet someone made?

Clara Bennett: Theoretically possible, economically brutal. They'd need 2D materials — molybdenum disulfide instead of silicon, because silicon just stops functioning reliably at those dimensions. The physics isn't forbidden, but the cost and thermal penalty at every successive node get sharper. No company's roadmap overrides quantum mechanics.

Finn Brooks: So the industry response is — what, work around it? Samsung adopted Gate-All-Around at 3 nanometers, Intel's got 18A coming, wrapping the gate entirely around the channel to suppress the leakage — but even that's buying time, right? Not solving tunneling.

Clara Bennett: Buying time, yes. GAA improves electrostatic control, chiplets disaggregate the die so you're not cramming everything onto one shrinking piece of silicon — those are real architectural gains. But none of them eliminate the underlying constraint. That's the part that's genuinely unsettling.

Clara Bennett: The thing I'm still sitting with — and I don't have a clean answer — is that Moore's Law was one number. One metric, and the whole industry knew where to walk. Chiplets, silicon photonics, neuromorphic computing for AI workloads — those are all real. TSMC's COUPE platform is in mass production, Ayar Labs just closed a five-hundred-million-dollar Series E for their TeraPHY optical engine chiplets, Lightmatter's shipping the Passage L200 and L200X now. That's not vaporware. But none of it is one number. There's no shared north star anymore, and I mean — imec is literally still publicly debating whether Moore's Law is dead because the answer changes depending on which definition you're measuring.

Finn Brooks: And whoever gets to *define* the replacement metric — TSMC, the photonics startups, whoever cracks the software stack for chiplet architectures — that's not a technical question, that's a power question. Like, that's who builds the next sixty years.

Clara Bennett: Yeah.

Finn Brooks: Finn started this at midnight because of a hundred billion transistors on a fingernail. Now I'm losing sleep for completely different reasons.

How quantum tunneling and heat density are slowing silicon scaling · Onpode