Megan Skiendel: David, hey — I have been sitting on something all week and I need you to just react to it, cold.
David Sterling: I'm ready, go.
Megan Skiendel: Gordon Moore published a note in Electronics Magazine in 1965 saying transistor counts had been doubling every year — at minimal cost increase. That's it. That's the whole thing. Not a theory, not a law, not a prediction derived from quantum mechanics. A cost curve observation from an engineer at Fairchild Semiconductor who looked at six data points and said, huh, I wonder if this keeps holding.
David Sterling: Six data points.
Megan Skiendel: Six. And then Intel, TSMC, Samsung — they built multi-billion-dollar capex cycles around it. Which is actually the more interesting thing, because it made the observation self-fulfilling. You plan around it, you hit it, you plan around it again.
David Sterling: Well — okay, that's the load-bearing fact, isn't it. It wasn't physics enforcing the cadence. It was capital allocation enforcing the cadence.
Megan Skiendel: Exactly — and here's what most people miss: Moore revised it downward in 1975. Doubled every two years, not one. Which is slower. And the industry treated that correction like it was acceleration carved in stone.
David Sterling: Wait — so the founding document of the semiconductor era is a revision to a slowdown, and everybody read it as the permanent rate?
Megan Skiendel: That's the whole thing. And the result — honestly, it's staggering when you say it plainly — 20 to 30 percent annual declines in cost per transistor, for decades. That's not physics. That's organized industrial commitment.
David Sterling: Which means the question isn't whether the physics wall is real. The question is whether the economic promise has broken. And I think Intel's 10nm and 7nm roadmap answers that — those slipped by years. Years. While TSMC hit the nodes on time.
Megan Skiendel: And the gap opened before anyone admitted it publicly. That's the part I want to dig into — who knew what, and when.
David Sterling: Right — but the part that doesn't fit is whether that's organizational failure at Intel or the first crack in the model itself. Those are different problems with very different consequences.
Megan Skiendel: But whether it's Intel's org chart or the physics — honestly, I think that distinction is about to collapse. Because below 3nm the physics doesn't care who's running the program.
David Sterling: Walk me through that. Plain language.
Megan Skiendel: Imagine you're building a hallway so narrow that the people walking through it start slipping through the walls. That's quantum tunneling. Below a certain size, electrons don't respect the barriers you built to contain them. They just leak through. That's not a manufacturing defect. That's not a process problem you fix with better chemicals. That is the physical world refusing to cooperate.
David Sterling: But haven't engineers always found a wall and then moved it? Gate-all-around transistors, EUV — those are workarounds.
Megan Skiendel: That's the right question. And the answer is — prior walls were manufacturing process problems. You needed better masks, more precise equipment, different chemicals. Engineering defects. Quantum tunneling and heat dissipation are thermodynamic and quantum mechanical effects. You can't engineer your way around the fact that power density rises faster than heat can be removed when you're packing transistors into a confined geometry. The wall moved before because the wall was made of sand. This one's bedrock.
David Sterling: I want to test that claim. Can you name the specific cost per transistor where it stops being economical at 2nm, or are we just — I mean, is there a number, or is this still a feeling?
Megan Skiendel: Fair. The bottleneck is structural rather than abstract — because it isn't just physics. ASML sells roughly one EUV machine per year to each chipmaker. One. At a hundred and fifty million dollars each.
David Sterling: Wait — one machine. Per year.
Megan Skiendel: One. The entire industry's ability to even attempt sub-3nm patterning runs through a single Dutch company. And EUV itself is pushing the physical limits of optical patterning — you can't just throw capital at that. ASML has one production line. You can't double it next quarter.
David Sterling: So the constraint isn't — actually, no, this reframes everything. It's not just physics or capital allocation. It's equipment supply from a monopoly. That's a geopolitical problem, not an engineering one.
Megan Skiendel: And Intel's roadmap slippage — 10nm, 7nm, years late — that showed up in practice before the industry admitted the model was breaking. The wall arrived in the org chart first.
David Sterling: Which means the honest reading is: the physics is real, the equipment monopoly is real, and Intel's execution failure wasn't a management anomaly — it was the first measurable proof that you can't schedule around bedrock.
Megan Skiendel: And if the wall arrived in the org chart first, that means the response had to come from the org chart too — not the physics lab. Which is exactly what happened. Chip designers in 2019 stopped asking 'how do we shrink this further' and started asking 'what if we just stopped building one piece of silicon at all.'
David Sterling: Chiplets.
Megan Skiendel: Chiplets. Picture a chip designer — say she's speccing out a new processor in late 2019 — and she realizes she physically cannot manufacture the full die as one piece and hit acceptable yield. Too big, too many defects, costs explode. So instead of one monolithic chip, she designs smaller tiles. Each tile does one job. They talk to each other over high-bandwidth bridges. Modular. Assembled, not grown.
David Sterling: That's not a workaround. That's a different architecture entirely.
Megan Skiendel: Exactly — and TSMC saw it coming. They didn't just hit 5nm before Intel. They built the packaging infrastructure to go with it. The 2.5D silicon interposer work, the 3D stacking — that's compute density going vertical instead of lateral. You stop fighting the lithography wall and you build upward.
David Sterling: While Intel was still trying to shrink the planar die.
Megan Skiendel: While Intel — I mean, Pat Gelsinger came in and announced a complete reset in 2021. That's not a refinement. That's an admission. The 10nm slipped, the 7nm slipped, and meanwhile TSMC had already restructured around heterogeneous integration. Same physics. Different bets, different execution.
David Sterling: The International Roadmap for Devices and Systems still projects performance gains forward, though. So — wait, is that projection being driven by shrinkage or by stacking now?
Megan Skiendel: Stacking and specialization. The IRDS is still publishing trajectories, but the mechanism delivering those gains has fundamentally shifted. It's heterogeneous integration now, not planar shrinkage. The roadmap continued — the engine underneath it changed.
David Sterling: Which is where Google's TPU comes in, frankly. That's the software-side version of the same move — you stop waiting for a faster general chip and you build something that only does matrix math for AI. Orders of magnitude faster for that one workload.
Megan Skiendel: And that's actually the part that should unsettle people more than the physics wall. Because the cost curve — the 20 to 30 percent annual decline that Moore's Law guaranteed — that is not following performance into the chiplet era. Specialization performs. It does not necessarily get cheaper. We'll get to what that means for who can even afford to compete, because the answer is going to be uncomfortable.
David Sterling: That's the load-bearing question. Performance decoupled from cost — that's a completely different business model than the last fifty years.
Megan Skiendel: And that decoupling is where the uncomfortable math starts. Moore's Law guaranteed two things moving together — density rising and cost per transistor falling. Twenty to thirty percent annually, like clockwork. When TSMC hit 5nm, the density was there. The cost per transistor was actually higher than at 7nm. Those curves split.
David Sterling: Hold on. Higher at 5nm than 7nm?
Megan Skiendel: Higher. Because the packaging complexity, the interconnect costs, the specialized design effort — none of that follows the same learning curve as lithography. Chiplets perform. They don't necessarily get cheaper. Those are two different things that we spent fifty years treating as one.
David Sterling: I mean — that's actually the structural break, isn't it. Not the physics wall. The moment the cost curve detached from the density curve. Everything downstream of that is a different industry.
Megan Skiendel: Different industry with different buyers. The AI compute buildout — Google buying custom TPU silicon, hyperscalers running volumes that dwarf anything the PC or server cycle ever touched — they can absorb that cost curve. They're already operating on the new model.
David Sterling: So the cost curve no longer democratizes compute. It concentrates it.
Megan Skiendel: That's exactly the frame. Think about who benefited from Moore's Law historically — every two years, a startup, a university lab, a mid-size enterprise could buy roughly the same compute capability the big players had before. That's gone if cost stops falling.
David Sterling: And Intel's trajectory is — frankly, it's the proof of concept for how badly this can go. They bet on the old model longer than anyone. They lost process leadership to TSMC. And now they're not just behind on nodes — they're behind on the packaging infrastructure that defines the new regime.
Megan Skiendel: And that wasn't physics. Pat Gelsinger's 2021 reset announcement — that was an org chart failure reaching its terminal point. The physics was identical for Intel and TSMC. The decisions weren't.
David Sterling: Which names the load-bearing assumption of the next decade. If capability is concentrating — Google, the hyperscalers, a handful of sovereign chip programs — what's the falsifiable prediction? Who actually gets priced out?
Megan Skiendel: Everyone who isn't buying at hyperscaler volumes or subsidized by a government industrial policy. Honestly, the mid-tier — the companies that built their entire stack assuming compute kept getting cheaper every two years — they're the ones the new model doesn't account for.
David Sterling: Well — and there's a tension inside the solution itself that nobody's talking about cleanly. 3D stacking concentrates heat vertically. Harder to dissipate than planar. The same heat dissipation problem that killed planar scaling reappears as the next wall for vertical scaling.
Megan Skiendel: The pivot traded one constraint for another.
David Sterling: The pivot traded one constraint for another. And the cost curve didn't come with it. That's the position the industry is actually in.
Megan Skiendel: Gordon Moore looked at six data points from Fairchild Semiconductor in 1965 and wrote a note. Not a law. A note. And the whole premise of that note was that density and cost moved together. One promise, two variables. The industry held that together for fifty years through sheer organized will, and now — honestly, those two variables have separated. The density side hits bedrock physics. The cost side gets absorbed by Google, by the hyperscalers, by sovereign chip programs. That's not Moore's Law dying. That's the promise splitting in half.
David Sterling: Six data points, and the back half of the century.
Megan Skiendel: Six data points, and the back half of the century. And what's strange — I mean, it's almost not about Gordon Moore at all anymore, is it. The engineers didn't quit. TSMC is still pushing. ASML is still shipping one EUV machine a year at a hundred and fifty million dollars. The Google TPU is still getting faster. The work didn't stop. The deal changed.
David Sterling: The deal changed. That's actually the cleaner frame than 'Moore's Law is dead.' Because dead implies the effort stopped. What actually happened is the cost curve stopped doing the democratizing work — the part that meant every two years, a mid-size company could buy what the hyperscalers had before. That's the thing that ended.
Megan Skiendel: Which is a different kind of ending.
David Sterling: Yeah. Not a wall. A fork.
Megan Skiendel: That's a better word for it than anything I had going in.
David Sterling: I'll take it. Thanks for bringing the six data points.
